REG_BYPASS_COUNT=REG_BYPASS_COUNT_0, COSC_EN=COSC_EN_0, RBC_EN=RBC_EN_0
CCM Control Register
| OSCNT | Oscillator ready counter value. These bits define value of 32KHz counter, that serve as counter for oscillator lock time (count to n+1 ckil’s). This is used for oscillator lock time. Current estimation is ~5ms. This counter will be used in ignition sequence and in wake from stop sequence if sbyos bit was defined, to notify that on chip oscillator output is ready for the dpll_ip to use and only then the gate in dpll_ip can be opened. |
| COSC_EN | On chip oscillator enable bit - this bit value is reflected on the output cosc_en 0 (COSC_EN_0): disable on chip oscillator 1 (COSC_EN_1): enable on chip oscillator |
| REG_BYPASS_COUNT | Counter for analog_reg_bypass signal assertion after standby voltage request by PMIC_STBY_REQ 0 (REG_BYPASS_COUNT_0): no delay 1 (REG_BYPASS_COUNT_1): 1 CKIL clock period delay 63 (REG_BYPASS_COUNT_63): 63 CKIL clock periods delay |
| RBC_EN | Enable for REG_BYPASS_COUNTER 0 (RBC_EN_0): REG_BYPASS_COUNTER disabled 1 (RBC_EN_1): REG_BYPASS_COUNTER enabled. |